An Optimized Balance Control for Capacitor Voltage of Modular Multilevel Converter under Max-Min Function Algorithm

M.A. Kuntian, L.I. Hua and X.U. Yu

Background and Objective: In the current MMC-HCDC engineering, the average voltage of the capacitor of the converter mostly adopts the sorting class algorithm. However, under this algorithm, after re-ordering each control cycle, the sub-modules will be heavily re-switched and the switching state of the sub-modules will change frequently. As a result, the service life of the sub-modules will be reduced and the investment in MMC-HVDC engineering will increase. So, it is important to research the switching frequency of sub-modules in MMC-HVDC engineering. Materials and Methods: In current research, the sub-module switching mode is divided into three types. Only change the switching status of Dn sub-modules with the largest or smallest capacitor voltage which have been selected. Results: The sorting algorithm which was already known and the Max-Min algorithm are compared in the PSCAD/EMTDC and the sub-module switching frequency of Max-Min algorithm is reduced from 1100-262.5 Hz. Max-Min algorithm has no negative effect on the amplitude of capacitance voltage fluctuation of the sub-module. The operation period is shortened and the operation burden is reduced. Conclusion: The computation time of the Max-Min function is shorter than that of the current sorting algorithm. Compared with the sorting algorithm which was already known, the switching frequency of the Max-Min function is smaller. It provides a new optimization strategy for the capacitance uniform voltage control under the sorting algorithm commonly used in the MMC-HVDC engineering.

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